1. Field of the Invention
The present invention generally relates to deposition of a metal layer onto a substrate. More particularly, the present invention relates to an apparatus and method used in electroplating a metal layer onto a substrate.
2. Description of the Related Art
Sub-quarter micron, multi-level metallization is one of the key technologies for the next generation of ultra large scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
As circuit densities increase, the widths of vias, contacts and other features decrease to less than 250 nanometers, whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, ie., their height divided by width, increases. Additionally, as the feature widths decrease, the device current remains constant or increases, which results in an increased current density in the feature. Many traditional deposition processes, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD), have difficulty filling structures where the aspect ratio exceed 4:1, and particularly where it exceeds 10:1.
As a result of process limitations, plating, which had previously been limited to the fabrication of lines on circuit boards, is emerging as a new process of choice to fill vias and contacts on semiconductor devices. Metal electroplating is generally known and can be achieved by a variety of techniques. Present designs of cells for electroplating a metal on a substrate are based on a fountain plater configuration.
FIG. 1 is a cross sectional view of a simplified typical fountain plater 10 incorporating contact pins. Generally, the fountain plater 10 includes an electrolyte container 12 having a top opening, a substrate holder 14 disposed above the electrolyte container 12, an anode 16 disposed at a bottom portion of the electrolyte container 12 and a contact ring 20 contacting the substrate 22. A plurality of grooves 24 are formed in the lower surface of the substrate holder 14. A vacuum pump (not shown) is coupled to the substrate holder 14 and communicates with the grooves 24 to create a vacuum condition capable of securing the substrate 22 to the substrate holder 14 during processing. The contact ring 20 comprises a plurality of metallic or semi-metallic contact pins 26 distributed about the peripheral portion of the substrate 22 to define a central substrate plating surface. The plurality of contact pins 26 extend radially inwardly over a narrow perimeter portion of the substrate 22 and contact a, conductive seed layer of the substrate 22 at the tips of the contact pins 26. A power supply (not shown) is attached to the pins 26 thereby providing an electrical bias to the substrate 22. The substrate 22 is positioned above the cylindrical electrolyte container 12 and electrolyte flow impinges perpendicularly on the substrate plating surface during operation of the cell 10.
While present day electroplating cells, such as the one shown in FIG. 1, achieve acceptable results on larger scale substrates, a number of obstacles impair consistent reliable electroplating onto substrates having micron-sized, high aspect ratio features. Generally, these obstacles include providing uniform power distribution and current density across the: substrate plating surface to form a metal layer having uniform thickness, preventing backside deposition and contamination, and selecting a vacuum or pressure condition at the substrate backside.
Repeatable uniform contact resistance between the contact pins and the seed layer on a particular substrate as well as from one substrate to the next is critical to achieving overall deposition uniformity. The deposition rate and quality are directly related to current flow. A. tenuous pin/seed layer contact restricts current flow resulting in lower deposition rates or unrepeatable results. Conversely, a firm pin/seed layer contact can improve repeatability and reduce contact resistance which will allow increased current flow and superior deposition. Therefore, the variations in contact resistance from pin to pin produces non-uniform plating across the substrate and, consequently, inferior or defective devices.
One attempt to improve power distribution is by increasing the surface area of the contact pins to cover a larger portion of the substrate. However, high points on the substrate abut portions of the plating cell, such as the substrate holder 14 and contact ring 20 shown in. FIG. 1, and skew the substrate leading to contact differentials from pin to pin on each substrate. Because contact pins are typically made of a rigid material, such as copper plated stainless steel, platinum, or copper, they do not accommodate the contact height differentials. Skewing may be further exacerbated by the irregularities and rigidity of the substrate holder 14 which supplies the contact force. Thus, adjustments to the geometry of the pins do not remedy the problems associated with topographical irregularities on the backside of the substrate or the substrate holder 14.
Current flow is further affected by the oxidation of the contact pins 26. The formation of an oxide layer on the contact pins 26 acts as a dielectric to restrict current flow. Over time the oxide layer reaches an unacceptable level requiring cleaning of the contact pins 215. Attempts to minimize oxidation have been made by constructing the contact pins 26 of a material resistant to oxidation such as copper or gold. However, although slowing the process, oxidation layers still formed on the contact pins 26 resulting in poor and inconsistent plating.
Another problem created by the substrate's backside topographical irregularities is failure of the vacuum condition between the substrate holder and the substrate. A hermetic seal at the perimeter of the substrate's backside is critical to ensuring the vacuum condition. Current technology employs the use of vacuum plates such as the substrate holder 14 shown in FIG. 1. However, the rigidity of the substrate holder 14 and the substrate 22 prevents a perfectly flush interface between the two components resulting in leaks. Leaks compromise the vacuum and require constant pumping to maintain the substrate 22 secured against the substrate holder 14. These problems may also be exacerbated by the irregularities of the hardware such as the substrate holder 14 and the contact pins 26.
The cell 10 in FIG. 1 also suffers from the problem of backside plating. Because the contact pins 26 only shield a small portion of the substrate surface area, the electrolyte is able to communicate with the backside of the substrate 22 and deposit thereon. The problem is exacerbated by seal failure between the substrate holder 14 and the substrate 22, is discussed above. Leaks in the seal allow the electrolytic solution onto the substrate's backside. Backside plating requires post-plating cleaning to avoid contamination problems upstream and increases the cost of processing.
Therefore, there remains a need for a method and apparatus maintaining a uniform and repeatable contact resistance delivering a uniform electrical power distribution to a substrate surface in an electroplating cell, maintaining a stable and constant vacuum or pressure condition between the substrate holder and the substrate, and preventing backside deposition.